Analysis and Fast Estimation of Energy consumption in template based QDI Asynchronous Circuits

In this paper we analyses the energy consumption of well known family of asynchronous circuits and present a new methodology for energy estimation of these circuits at intermediate-level of abstraction. Energy estimation is performed by simulating the intermediate format of the design. The number of Read and Write accesses on the ports of the concurrent processes are counted by analyzing the conditional and computational portion during the simulation which is the base of our estimation methodology. Our proposed power estimation scheme is faster than usual post-synthesis power estimation by an order of 9, while the estimated power resides in a boundary of 11% total imprecision.